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8-bit MCU IP

The 8032 series is a high-performance 8051 family compatible micro-controller based on RISC architecture & Pipeline design. This IP Specification of interface timing, external Data Memory read / write timing and external Program Memory read timing are same or faster than standard 80C52 ,based on different version, and instruction-set is fully compatible with standard 8051 family.

Design Specification

  1. RISC Architecture
  2. Synchronous Design
  3. Static Design
  4. Synthesizable
  5. Silicon proved (0~66 MHz at 0.5um process)

Key features

  • Instruction compatible with generic 8051
  • 256 byte scratchpad RAM interface
  • Two external interrupts
  • Memory Addressing Capability
  • -64K Byte external RAM & ROM
  • 8-bit I/O port x 4 (P0~P3)
  • 16-bit timer/counter x3
  • Full duplex UART x1
  • Data Pointer x1
  • Watch Dog Timer x1
  • Support Power Down and Idle Mode
  • Power Down waked up by Interrupt
  • 12/4/1 clocks/machine cycle (S/T/TT or TTE/TTEX)
  • Dual data pointer (Above T)

Deliverable

  1. Product Data Specification
  2. RTL code in Verilog format
  3. Pipeline Diagram
  4. Synthesis Script file
  5. Function Test Pattern in Verilog format

Application

DSC,CF Card, Pattern Recognition, LCD Monitor Controller, USB Device Controller, Scanner Controller, MP3 Controller, Modem Controller, Voice Recognition

Spec Summary

R8032S R8032T R8032TT R8032TTE R8032TTEX
RISC Arch v v v v v
Machine Cycle 12 4 1 1 1
Static & Synchronous v v v v v
8052 Inst, Comptabile v v v v v
Dual DPTR -- v v v v
Timer 3 3 3 3 3
PD waked up by Int0 / Int1 v v v v v
UART 1 2 2 2 2
MUL Inst. Enchance -- -- v v v
Mem Ins wait-state -- v v v v
Code Ins wait-state -- -- -- -- v
MOVC Protect -- -- -- -- v
Watch dog timer -- v v v v
Power Manager -- -- v v v
Extra I/O, Interrupt -- -- -- -- v
PWM -- -- -- -- v
Serial E2ROM Interface -- -- -- -- v
Debug Mode Optional Optional Optional Optional v

 

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